The present invention relates to charge pumps for use in integrated circuits. More particularly, the present invention relates to a charge pump circuit having current sources configured for supplying current to the charge pump capacitors to regulate the charging and discharging current of the charge pump.
The demand for less expensive, and yet more reliable integrated circuit components for use in communication, imaging and high-quality video applications continues to increase rapidly. As a result, integrated circuit manufacturers are requiring improved performance in the voltage supplies and references for such components and devices to meet the design requirements of such emerging applications.
One device utilized for providing a regulated voltage supply is a charge pump circuit. Charge pumps are DC/DC converters that utilize a capacitor instead of an inductor or transformer for energy storage, and are configured for generating positive or negative voltages from the input voltage. One more common type of charge pump utilized in circuits comprises one configured for doubling the input voltage, i.e., a charge pump voltage doubler, while other frequently utilized charge pumps comprises tripler and inverter configurations. These charge pumps can operate to multiply the input voltage by some factor, such as by one-half, two, or three times or any other suitable factor of the input voltage, to generate the desired output voltage.
Charge pumps typically utilize transistors and/or diodes as ideal switching devices to provide current paths for charge transfer. On occasions when the sum of any residual voltages of the charging capacitors in a charging/discharging circuit loop is smaller than the voltage of the power supply, a significantly large amount of transient current tends to flow within the loop. Further, an uncontrolled peak current occurring during charging or discharging of the capacitors is only limited by the xe2x80x9con-resistancexe2x80x9d of the switching devices and the equivalent series resistance (ESR) of the capacitors. Moreover, the uncontrolled alternating peak current generally flows out of the positive power supply and into the negative power supply, e.g., into ground, thus causing significantly large electromagnetic interference (EMI) to associated electronic circuits. Still further, the large uncontrolled current also tends to charge the output reservoir capacitor which results in large voltage ripples at the output of the charge pump.
To limit the voltage ripple to a tolerable level, the reservoir capacitor can be configured with a larger capacitance value. However, such an arrangement is not desirable in that such a larger value capacitor results in a larger total printed circuit board area and higher manufacturing costs.
Another problem related to charge pump voltage doublers, triplers and inverters is the requirement for higher voltage processes than the nominal supply voltage. Since the output voltage, or the voltage at the internal nodes compared to the lowest potential in the charge pump circuit, can reach a level twice or more of the supply voltage, the breakdown voltage requirement for the processes used to manufacture these charge pumps is not limited by the supply voltage or the output voltage. Moreover, the voltage across some of the switching devices within the charge pumps may exceed the maximum allowable voltage for a given process. Accordingly, processes with higher breakdown voltages are essential requirements for charge pump regulators implemented within integrated circuit applications, thus resulting in increased costs and circuit size compared to circuits implemented in low voltage processes.
With reference to FIG. 1, a conventional charge pump 100 configured as a voltage doubler is illustrated. Charge pump doubler 100 comprises four switches S1, S2, S3 and S4, a pump capacitor CPUMP, and a reservoir capacitor CRES. The charging and discharging current of capacitor CPUMP is determined by the difference between an supply voltage VIN and an output voltage VOUT, the on-resistance for the switches S1, S2, S3 and S4, and the ESR of capacitors CPUMP and CRES.
Charge pump doubler 100 is typically controlled by a clock having a 50% duty cycle, i.e., a clock having a clock phase-one and phase-two. During clock phase-one, switches S2 and S3 are turned xe2x80x9conxe2x80x9d to charge capacitor CPUMP to approximately the supply voltage VIN, while switches S1 and S4 remain in an xe2x80x9coffxe2x80x9d condition. During clock phase-two, switches S1 and S4 are turned xe2x80x9conxe2x80x9d, while switches S2 and S3 are turned xe2x80x9coffxe2x80x9d, to charge capacitor CRES to a higher voltage potential. If the output voltage VOUT is not otherwise regulated, output voltage VOUT will reach a value of approximately twice the supply voltage VIN.
The selection of the on-resistance for switches S1, S2, S3 and S4 is difficult, in that while switches S1, S2, S3 and S4 generally need to be configured to provide a high enough on-resistance to limit any inrush current, switches S1, S2, S3 and S4 must also be configured to provide a low enough on-resistance to output sufficient current at a low level of supply voltage VIN. Due to the concurrent need to provide such a low enough on-resistance, a large inrush of current can occur during the closing of switches S2 and S3, or S1 and S4, thus resulting in conductive noise within the charge pump doubler 100. In addition, the on-resistances of switches S1, S2, S3 and S4 are generally configured on the same order of magnitude in an attempt to optimize performance and minimize the die size, and thus the voltage drops on all switches S1, S2, S3 and S4 are also on the same order of magnitude, regardless of the location and purpose of switches S1, S2, S3 and S4, e.g., whether for charging or discharging functions.
As discussed, higher voltage processes are generally required for prior art charge pumps. For example, with reference to FIG. 1, let""s assess a case where VIN and VOUT have the same voltage level and S1 and S4 have the same on-resistance, RON, i.e., the sizes of S1 and S4 are similar. In steady state, pump capacitor CPUMP may be charged to a voltage close to VIN in the charging phase, and S2 and S3 are xe2x80x9cclosed,xe2x80x9d and S1 and S4 are xe2x80x9copen.xe2x80x9d At the moment S2 and S3 are opened and S1 and S4 are closed, due to the fact that S1 and S4 have the same on-resistance RON and the voltage across CPUMP, i.e., VPUMP equals VIN and VOUT, the inrush current, IINRUSH becomes:
(VIN+VPUMPxe2x88x92VOUT)/(2*RON) or VOUT/(2*RON).
Therefore, the voltage at node B, VB, becomes much higher than VIN or VOUT:
VB=VOUT+IINRUSH*RON, or VB=1.5*VOUT.
This result means that the breakdown voltage of the process needs to be at least 1.5 times the rated input or output voltage of the regulator.
Accordingly, this scenario prevents processes with voltage ratings as low as the supply voltage VIN and the output voltage VOUT from being utilized for charge pump doublers. Moreover, as the supply voltage VIN increases from a low level to a high level, the on-resistance of switches S1, S2, S3 and S4 tends to decrease exponentially to a very low level due to a higher gate driving voltage. Accordingly, the current flowing through, i.e., the current flowing to ground and to capacitor CRES, becomes excessively large, thus resulting in uncontrolled output voltage ripple and conducted EMI.
A large number of currently available charge pumps, including charge pump regulators known as switched-capacitor regulators, utilize low on-resistance switches in order to boost current output capability at low supply voltages. The use of low on-resistance switches causes the injection of large uncontrolled pulsed current into the output or reservoir capacitor and to ground, thus generating larger EMI and output voltage ripple.
One approach for resolving the problems discussed above is disclosed in U.S. Pat. No. 5,973,944, issued on Oct. 26, 1999 to Nork and assigned to Linear Technology Corporation (xe2x80x9cNorkxe2x80x9d), discloses a switching regulator circuit using a common switch network. With reference to FIG. 2, a switched capacitor step-up and step-down DC-DC converter circuit 200 is illustrated. Nork discloses that a converter 200 includes control circuitry 201 for sensing the voltage differential between the input and output voltages, and which enables the minimum number of switch sections needed to fully regulate the output, while using the highest on-resistance possible to minimize the inrush current.
Despite the use of multiple switches for monitoring the output of the circuit, this converter has its drawbacks, such as high output voltage ripple. For example, one related approach includes the use of multiple transistors in a parallel configuration to provide the switches for the charge pump circuit. In this example, a switched capacitor DC/DC converter available from Linear Technology Corporation, known as the model LTC1515 converter, utilizes three binary-weighted transistors having a different on-resistance for one or more of the switches in a charge pump doubler circuit. During operation, when the input supply voltage is low, all of the paralleled transistors are turned xe2x80x9conxe2x80x9d resulting in a low on-resistance that allows sufficient current to flow. On the other hand, when the input supply voltage is high, smaller transistors are turned xe2x80x9conxe2x80x9d to provide higher on-resistance which can limit the peak charging/discharging current.
However, due to the small number of paralleled transistors, the peak current and output voltage ripple realize significant step increases as the supply voltage is varied. In other words, while using split switches comprising paralleled transistors can facilitate better control over the charging and discharging currents than single transistor switches, such control methods result in steps in the magnitude of the charging and discharging currents, due to the discrete step changes in the magnitude of the on-resistance of the switches. In addition, within each step, the peak current is still dependent upon the level of the supply voltage. Although increasing the number and frequency of the discrete steps, i.e., the different levels of on-resistance of the paralleled transistors, can increase the resolution of the current control, such a solution also requires the implementation of an analog-to-digital converter, and thus more area on the integrated circuit. Moreover, such a control scheme may provide a slow response characteristic to any rapid supply voltage and load variations. Further, such a control scheme does not enable the utilization of a low voltage process for the charge pump regulators with the input voltage as it increases to the breakdown voltage level.
Another approach to the above problems with charge pumps includes the use of a small transistor in parallel with a large transistor, for example a transistor ten times the size of the small transistor, to provide one of the switches in the charge pump circuit. The large transistor is utilized to switch xe2x80x9conxe2x80x9d and xe2x80x9coffxe2x80x9d the current in normal operations regardless of the supply voltage, while the small switch is utilized only during the startup condition to limit the startup in-rush current. However, this approach limits the current only during the startup condition, which results in a prolonged startup process due to the small startup current. Moreover, this approach does not limit the current or reduce the output voltage ripple after the charge pump circuit initiates operation. Still further, like the paralleled transistor approach above, this approach does not enable the utilization of a low voltage process for the charge pump regulators with the input voltage as it increases to the breakdown voltage level.
More recent approaches have attempted to include a switch circuit configured for regulating the charge pump by varying the impedance of the switch circuit at a fixed frequency. While such an approach may be able to regulate the output voltage, the approach does not sufficiently address output ripple or inrush current.
Still further, other approaches have included attempts to introduce a single-current source in series with switch S1, and then regulate the charge pump at a fixed frequency, i.e., linearly regulate the amount of charge on the output per cycle. However, such approaches are generally more difficult and less efficient, and only address output voltage ripple.
Accordingly, a need exists for an improved charge pump regulator that can provide reduced output voltage ripple, a lower inrush of current, and reduced EMI emissions. In addition, a need exists for an charge pump regulator to operate with a low voltage process with the input voltage up to the breakdown voltage level, without significantly increasing the costs and size of the circuit.
The charge pump circuit according to the present invention addresses many of the shortcomings of the prior art. In accordance with various aspects of the present invention, a charge pump circuit is configured with one or more current sources for suitably controlling the charging and/or discharging current in the charge pump capacitors. In accordance with one aspect of the present invention, the currents of the current sources can be determined by the load current requirements, rather than the on-resistance of any switches or the ESR of any capacitors, thus allowing a significant reduction of the peak current drawn from the power supply as well as the peak current injected into the output reservoir capacitor. In accordance with an exemplary embodiment, the charge pump circuit is suitably configured with a current source in series with the input supply voltage to control the total current in the charge pump. The current sources can comprise various types of current source configurations in accordance with various exemplary embodiments of the present invention. As a result, the output voltage ripple can be minimized with significantly reduced capacitance requirements for the output reservoir capacitor, in addition to significantly reducing the conducted EMI.
In accordance with another aspect of the present invention, the charge pump circuit can be configured with current limited switches for controlling the total current. For example, current sources can be suitably configured to replace one or more switches in the charge pump circuit to effectively control the total current in the charge pump circuit. By feeding the charge pump capacitors with switched current sources, the voltage across the current sources can be suitably limited to the supply voltage or the output voltage. In addition, the current sources can operate as resistor devices with adjustable impedances, and be configured to suitably reduce or eliminate the excessive supply voltage across the current sources. In accordance with various exemplary embodiments, the switched current sources can comprise various current mirror configurations. As a result, the requirement for the breakdown voltage can be significantly reduced. In addition, through use of a low voltage process, the cost and packaging size can be suitably reduced.
In accordance with another aspect of the present invention, it may be desirable for an exemplary charge pump circuit to be configured to utilize a large charging/discharging current to suitably maximize the power available at the output load. In accordance with this aspect of the present invention, any current limited switches can be suitably disabled or otherwise configured to provide a lower on-resistance to enable a larger charging/discharging current into the charge pump circuit, such as when the input supply voltage is low.